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Craig 'n' Dave

OCR A level (H046-H446) SLR 15 – Boolean Algebra

This download provides you with a zip file which contains all the resources you will need to deliver this topic.

It includes:

  • Student Learning Record (A3 version in word)
  • Student Learning Record (PDF version)
  • Student Learning Record (PowerPoint version)
  • Student Learning Record (Exemplars)
  • Set of student activities and workshops with answers
  • Answers to the exam questions from the back of the SLR
  • Teacher Marking Checklist
  • Year 13 Recap Lesson

H046

  • 1.4.3 a-c Boolean Algebra

H446

  • 1.4.3 a-e Boolean Algebra

Specific knowledge required for AS and A Level:

  • Candidates should be familiar with AND, OR, NOT and XOR. Candidates should be familiar with the logic of each Boolean operator, and the truth tables.
  • Candidates should be able to construct logic gate diagrams from a Boolean expression and viceversa.
  • Candidates should be able to construct truth tables from Boolean expressions and logic gate diagrams.
  • Candidates should have an understanding that Boolean expressions can be simplified and should have experience of simplifying expressions using Karnaugh maps.
  • Candidates should be able to create, complete and interpret Karnaugh maps to simplify Boolean expressions.

Specific knowledge required for A Level ONLY:

  • Candidates should be aware of the given De Morgan’s laws and should be able to apply these to a Boolean statement.
  • Candidates should have experience of manipulating and simplifying Boolean statements using these rules of distribution, commutation, association and double negation.
  • Candidates need to understand the purpose and principles of D type flip flops and how and where they are used in a computer. They should be able to recognise how they can be triggered by a clock pulse (see practice paper 2 for an example).
  • Candidates are not expected to memorise the logic gates that make up a D-type flip flop.
  • Candidates need to understand the purpose and function of an adder circuit, and the difference between a half and full adder. They should be able to recognise and draw the logic gates and truth tables for full and half adders.

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